? 1999 california micro devices corp. all rights reserved. 9/99 215 topaz street, milpitas, california 95035 tel: (408) 263-3214 fax: (408) 263-7846 www.calmicro.com 1 CMPWR150 california micro devices 500ma / 3.3v smartor? power regulator features pin diagrams ? automatic detection of v cc input supply ? drive output logic to control external switch ? glitch-free output during supply transitions ? 500ma output maximum load current ? built-in hysteresis during supply selection ? controller operates from either v cc or v out ? 8-pin soic thermal or 5-pin to-263 packages applications ? pci adapter cards ? network interface cards (nic?s) ? dual power systems ? systems with standby capabilities ? see application note ap-211 product description california micro devices smartor tm CMPWR150 is a low dropout regulator that delivers up to 500ma of load current at a fixed 3.3v output. an internal threshold level (typically 4.1v) is used to prevent the regulator from being operated below dropout voltage. the device continuously monitors the input supply and will automatically disable the regulator when v cc falls below the threshold level. when the regulator is disabled, the control signal ?drive? (active low) is enabled, which allows an external pmos switch to power the load from an auxiliary 3.3v supply. when v cc is restored to a level above the select threshold, the control signal for the external pmos switch is disabled and the regulator is once again enabled. all the necessary control circuitry needed to provide a smooth and automatic transition between the supplies has been incorporated. this allows v cc to be dynamically switched without loss of output voltage. the CMPWR150 is available in either an 8-pin soic thermally enhanced package, ideal for space critical applications, or a 5-pin to-263 package. c0590899 n o i t a m r o f n i g n i r e d r o t r a p d r a d n a t s e g a k c a p r e b m u n t r a p g n i r e d r o s n i pe l y t sg n i k r a m t r a pl e e r & e p a ts e b u t 8l a m r e h t c i o sa s 0 5 1 r w p m cr / a s 0 5 1 r w p m ct / a s 0 5 1 r w p m c 53 6 2 - o to t 0 5 1 r w p m cr / o t 0 5 1 r w p m ct / o t 0 5 1 r w p m c typical application circuit simplified electrical schematic smartor? is a trademark of california micro devices corp. CMPWR150 CMPWR150to 5-pin to-263 package CMPWR150sa 8-pin soic thermal package n.c. gnd v cc gnd v out gnd drive gnd n.c. v cc v out gnd drive top view top view
?1999 california micro devices corp. all rights reserved. 9/99 215 topaz street, milpitas, california 95035 tel: (408) 263-3214 fax: (408) 263-7846 www.calmicro.com 2 CMPWR150 california micro devices note 1: the soic package used is thermally enhanced through the use of a fused integral leadframe. the power rating is based on a printed circuit board heat spreading capability equivalent to 2 square inches of copper connected to the gnd pins. typical multi-layer boards using power plane construction will provide this heat spreading ability without the need for additional dedicated copper area. (please consult with factory for thermal evaluation assistance.) note 2: the hysteresis defines the maximum level of acceptable disturbance on v cc during switching. it is recommended that the v cc source impedance be kept below 0.25 w to ensure the switching disturbance remains below the hysteresis during select/deselect transitions. an input capacitor may be required to help minimize the switching transient. note 3: ground pin current consists of controller current (0.15ma) and regulator current if enabled. the controller always draws 0.15ma from either v cc or v out , whichever is greater. all regulator current is supplied exclusively from v cc . at high load currents a small increase occurs due to current limit protection circuitry. s c i t s i r e t c a r a h c g n i t a r e p o l a c i r t c e l e ) e s i w r e h t o d e i f i c e p s s s e l n u s n o i t i d n o c g n i t a r e p o r e v o ( l o b m y sr e t e m a r a ps n o i t i d n o cn i mp y tx a mt i n u v t u o e g a t l o v t u p t u o r o t a l u g e ri > a m 0 0 5 d a o l a m 0 >5 3 1 . 30 3 . 35 6 4 . 3v i t u o t n e r r u c t u p t u o r o t a l u g e r 0 0 50 0 8a m v l e s c c e g a t l o v t c e l e sd e l b a n e r o t a l u g e r5 3 . 45 4 . 4 v s e d c c e g a t l o v t c e l e s e dd e l b a s i d r o t a l u g e r0 9 . 30 1 . 4v v t s y h c c e g a t l o v s i s e r e t s y hs i s e r e t s y h 2 e t o n 5 2 . 0 i c / s t n e r r u c t u p t u o t i u c r i c t r o h sv c c v , v 5 = t u o v 0 =0 0 2 1a m i c c r v c c e g a k a e l e s r e v e r n i pv t u o v , v 3 . 3 = c c v 0 =50 5 m a v d a o l r n o i t a l u g e r d a o lv c c i , v 5 = d a o l a m 0 0 5 o t a m 0 5 =5 7v m v e n i l r n o i t a l u g e r e n i lv c c i , v 5 . 5 o t v 5 . 4 = d a o l a m 5 =2v m i c c t n e r r u c y l p p u s t n e c s e i u qv c c v > , l e s c c i d a o l a m 0 =0 . 10 . 3 v s e d c c v > c c v > t u o 5 1 . 05 2 . 0a m v t u o v > c c 1 0 . 02 0 . 0 i d n g t n e r r u c n i p d n u o r g 3 e t o n d e l b a s i d r o t a l u g e r5 1 . 00 3 . 0 v c c i , v 5 = d a o l a m 5 =0 . 15 . 2a m v c c i , v 5 = d a o l a m 0 0 5 =2 . 10 . 3 r h o e c n a t s i s e r p u - l l u p e v i r dr p u l l u p v o t c c v , c c v > l e s c c 0 0 10 0 4 w r l o e c n a t s i s e r n w o d - l l u p e v i r dr n w o d l l u p v , d n g o t s e d c c v > c c 0 0 20 0 4 t h d y a l e d h g i h e v i r dc e v i r d v , f n 1 = c c t e s i r s n 0 0 1 <0 . 1 m s t l d y a l e d w o l e v i r dc e v i r d v , f n 1 = c c t l l a f s n 0 0 1 <2 . 0 s g n i t a r m u m i x a m e t u l o s b a r e t e m a r a pg n i t a rt i n u ) m b h ( n o i t c e t o r p d s e0 0 0 2v v c c e g a t l o v t u p n i5 . 0 - d n g , 0 . 6 +v e g a t l o v c i g o l e v i r dv c c 5 . 0 - d n g , 5 . 0 +v e g n a r e r u t a r e p m e t e g a r o t s0 5 1 + o t 0 4 - o c t n e i b m a g n i t a r e p o0 7 + o t 0 n o i t c n u j g n i t a r e p o5 2 1 + o t 0 3 6 2 - o t : n o i t a p i s s i d r e w o p c i o s 1 e t o n 0 . 1w s n o i t i d n o c g n i t a r e p o r e t e m a r a pe g n a rt i n u v c c 5 . 0 0 . 5v ) t n e i b m a ( e r u t a r e p m e t0 7 + o t 0 o c t n e r r u c d a o l0 0 5 o t 0a m c t x e % 0 1 0 1 m f
? 1999 california micro devices corp. all rights reserved. 9/99 215 topaz street, milpitas, california 95035 tel: (408) 263-3214 fax: (408) 263-7846 www.calmicro.com 3 CMPWR150 california micro devices interface signals v cc is the power source for the internal regulator and is monitored continuously by an internal controller circuit. whenever v cc exceeds v ccsel (4.35v typically), the internal regulator (500ma max) will be enabled and deliver a fixed 3.3v at v out . when v cc falls below v ccdes (4.10v typically) the regulator will be disabled internal loading on this pin is typically 1.0ma when the regulator is enabled, which reduces to 0.15ma whenever the regulator is disabled. if v cc falls below the voltage on the v out pin the v cc loading will further reduce to only a few microamperes. during a v cc power up sequence, there will be an effective step increase in v cc line current when the regulator is enabled. the amplitude of this step increase will depend on the dc load current and any necessary current required for charging/discharging the load capacitance. this line current transient will cause a voltage disturbance at the v cc pin. the magnitude of the disturbance will be directly proportional to the effective power supply source impedance being delivered to the v cc input. to prevent chatter during select and deselect transitions, a built-in hysteresis voltage of 250mv has been incorporated. it is recommended that the power supply connected to the v cc input should have a source resistance of less than 0.25 w to minimize the event of chatter during the enabling/ disabling of the regulator. an input filter capacitor in close proximity to the v cc pin will reduce the effective source impedance and help minimize any disturbances. if the v cc pin is within a few inches of the main input filter, a capacitor may not be necessary. otherwise an input filter capacitor in the range of 1uf to 10uf will ensure adequate filtering. gnd is the negative reference for all voltages. the current that flows in the ground connection is very low (typically 1.0ma) and has minimal variation over all load conditions. v out is the regulator output voltage connection used to power the load. an output capacitor of ten microfarads is used to provide the necessary phase compensation, thereby preventing oscillation. the capacitor also helps to minimize the peak output disturbance during power supply changeover. when v cc falls below v out , then v out will be used to provide the necessary quiescent current for the internal reference circuits. this ensures excellent start-up characteristics for the regulator. drive is an active low logic output intended to be used as the control signal for driving an external pfet whenever the regulator is disabled. this will allow the voltage at v out to be powered from an auxiliary supply voltage (3.3v). the drive pin is pulled high to v cc whenever the regulator is enabled. this ensures that the auxiliary remains isolated during normal regulator operation. n.c. pins are electrically isolated from the internal circuitry. these pins can be connected to any external voltage level without impacting the device funtionality. s n o i t c n u f n i p l o b m y sn o i t p i r c s e d v c c v n e h w . r o t a l u g e r r o f t u p n i y l p p u s e v i t i s o p c c . d e l b a s i d s i r o t a l u g e r e h t , v 1 . 4 w o l e b s l l a f d n g. s e g a t l o v l l a r o f e c n e r e f e r e v i t a g e n v t u o n e h w r o t a l u g e r ) v 3 . 3 ( t u p t u o e g a t l o v r o t a l u g e rv c c n e h w . t n e s e r p s iv c c e h t , t n e s e r p t o n s i v n o e g a t l o v t u o . s e c n e r e f e r l a n r e t n i e h t s a i b o t d e s u s i e v i r d y r a i l i x u a n a g n i t c e l e s r o f h c t i w s s o m p l a n r e t x e l o r t n o c o t d e d n e t n i t u p t u o c i g o l s o m c v n e h w y l p p u s e g a t l o v c c . t n e s e r p t o n s i . c . n . y r t i u c r i c l a n r e t n i m o r f d e t a l o s i y l l a c i r t c e l e e r a h c i h w s n i p d e t c e n n o c n u
?1999 california micro devices corp. all rights reserved. 9/99 215 topaz street, milpitas, california 95035 tel: (408) 263-3214 fax: (408) 263-7846 www.calmicro.com 4 CMPWR150 california micro devices typical dc characteristics unless stated otherwise, all dc characteristics were measured at room temperature with a nominal v cc supply voltage of 5.0 volts and an output capacitance of 10 m f. the external pmos switch was present and resistive load conditions were used. the test data shown here was obtained from engineering samples. the device was modified to allow the regulator to function below the dropout threshold for the purpose of obtaining test data. during normal operation, production parts will shutdown the regulator below a 4.1v supply. dropout characteristics of the regulator are shown in figure 1. at maximum rated load conditions (500ma), a 100mv drop in regulation occurs when the line voltage collapses below 4.1v. for light load conditions (50ma), regulation is maintained for line voltages as low as 3.5v. in normal operation, the regulator is deselected at 4.1v, which ensures a regulation output droop of less than 100mv is maintained. figure 1. dropout characteristics. load regulation performance is shown from zero to maximum rated load in figure 2. a change in load from 10% to 100% of rated, results in an output voltage change of less than 75mv. this translates into an effective output impedance of approximately 0.15 w . ground current is shown across the entire range of load conditions in figure 3. the ground current has minimal variation across the range of load conditions and shows only a slight increase at maximum load. this slight increase at rated load is due to the current limit protection circuitry becoming active. figure 2. load regulation. figure 3. ground current.
? 1999 california micro devices corp. all rights reserved. 9/99 215 topaz street, milpitas, california 95035 tel: (408) 263-3214 fax: (408) 263-7846 www.calmicro.com 5 CMPWR150 california micro devices when v aux is present, the v cc supply current is less than 10 m a until v cc exceeds v aux , at which point v cc then powers the controller (0.15ma). when v cc reaches v select , the regulator is enabled. typical transient characteristics the transient characterization test set-up shown below includes the effective source impedance of the v cc supply (r s ). this was measured to be approximately 0.2 w . it is recommended that this effective source impedance be no greater than 0.25 w to ensure precise switching is maintained during v cc selection and deselection. both the rise and fall times during v cc power-up/down sequencing were controlled at a 20 millisecond duration. this is considered to represent worst case conditions for most application circuits. a maximum rated load current of 500ma was used during characterization, unless specified otherwise. typical dc characteristics (continued) figure 4. v cc supply current (no load). during a selection or deselection transition, the dc load current is switching from v aux to v cc and vice versa. in addition to the normal load current, there may also be an in-rush current for charging/discharging the load capacitor. the total current pulse being applied to either v aux or v cc is equal to the sum of the dc load and the corresponding in- rush current. transient currents in excess of 1.0 amps can readily occur for brief intervals when either supply commences to power the load. the oscilloscope traces of v cc power-up/down show the full bandwidth response at the v cc and v out pins under full load (500ma) conditions. see application note ap-211 for more information. v cc power-up cold start. figure 5 shows the output response during an initial v cc power-up with v aux not present. when v cc reaches the select threshold, the regulator turns on. the uncharged output capacitor causes maximum in-rush current to flow, resulting in a large voltage disturbance at the v cc pin of about 230mv. the built-in hysteresis of 250mv ensures the regulator remains enabled throughout the transient. prior to v cc reaching an acceptable logic supply level (2v), a disturbance on the drive pin can be observed. figure 5. v cc power-up cold start. f v cc supply current of the device is shown across the entire v cc range for both v aux present (3.3v) and absent (0v) in figure 4. in the absence of v aux , the supply current remains fixed at approximately 0.15ma until v cc reaches the select voltage threshold of 4.35v. at this point the regulator is enabled and a supply current of 1.0ma is conducted. transient characteristics test set-up CMPWR150
?1999 california micro devices corp. all rights reserved. 9/99 215 topaz street, milpitas, california 95035 tel: (408) 263-3214 fax: (408) 263-7846 www.calmicro.com 6 CMPWR150 california micro devices v cc power-up (v aux =3.3v). figure 6 shows the output response as v cc approaches the select threshold during a power-up when v aux is present (3.3v). the output capacitor is already fully charged. when v cc reaches the select threshold, the in-rush current is minimal and the v cc disturbance is only 130mv. the built-in hysteresis of 250mv ensures the regulator remains enabled throughout the transient. v out offset = 3.3v, v cc offset = 4.3v v cc power-up (v aux =3.0v). figure 7 shows the output response as v cc approaches the select threshold during power-up. the auxiliary voltage, v aux is set to a low level of 3.0v. when v cc reaches the select threshold, a modest level of in-rush current is required to further charge the output capacitor resulting in v cc disturbance of 200mv. the built-in hysteresis of 250mv ensures the regulator remains enabled throughout the transient. v out offset = 3.3v, v cc offset = 4.3v typical transient characteristics (continued) figure 6. v cc power-up (v aux =3.3v). v cc power-down (v aux = 3.3v). figure 8 shows the output response as v cc approaches the deselect threshold during a power-down transition. v aux of 3.3v remains present. when v cc reaches the deselect threshold (4.1v), the regulator turns off. this causes a step change reduction in v cc current resulting in a small voltage increase at the v cc input. this disturbance is approximately 100mv and the built-in hysteresis of 250mv ensures the regulator remains disabled throughout the transient. the output voltage experiences a disturbance of approximately 100mv during the transition. v out offset = 3.3v, v cc offset = 4.3v figure 7. v cc power-up (v aux =3.0v). figure 8. v cc power-down (v aux = 3.3v).
? 1999 california micro devices corp. all rights reserved. 9/99 215 topaz street, milpitas, california 95035 tel: (408) 263-3214 fax: (408) 263-7846 www.calmicro.com 7 CMPWR150 california micro devices v cc power-down (v aux = 0v). figure 9 shows the output response of the regulator during a complete power-down situation under full load conditions. once v cc falls below an acceptable logic supply level (2v), a disturbance on the drive pin can be observed. drive offset = 5.0v load step response. figure 10 shows the output response of the regulator during a step load change from 5ma to 500ma (represented on ch1). an initial transient overshoot of 50mv occurs and the output settles to its final voltage within a few microseconds. the dc voltage disturbance on the output is approximately 75mv, which demonstrates the regulator output impedance of 0.15 w . v out offset = 3.3v typical transient characteristics (continued) figure 9. v cc power-down (v aux = 0v). figure 10. load step response. typical thermal characteristics thermal dissipation of junction heat consists primarily of two paths in series. the first path is the junction to the case ( q jc ) thermal resistance, which is defined by the package style, and the second path is the case to ambient ( q ca ) thermal resistance, which is dependent on board layout. for a given package style and board layout, the operating junction temperature is a function of junction power dissipation p junc and the ambient temperature, resulting in the following thermal equation: t junc = t amb + p junc ( q jc ) + p junc ( q ca ) the to-263 style package has q jc of 3c/w and when mounted, using minimum pad layout with tab soldered down, produces a q ca of 48c/w. based on maximum power dissipation of 1.0w (2vx500ma) with an ambient of 70c the resulting junction temperature will be: t junc = t amb + p junc ( q jc ) + p junc ( q ca ) = 70c + 1.0w (3c/w) + 1.0w (48c/w) = 70c + 3.0c + 48c = 121c figure 11. line step response. line step response. figure 11 shows the output response of the regulator to a v cc line voltage transient between 4.5v and 5.5v (1vpp as shown on ch1). the load condition during this test is 5ma. the output response produces less than 10mv of disturbance on both edges indicating a line rejection of better than 40db at high frequencies. v out offset = 3.3v
?1999 california micro devices corp. all rights reserved. 9/99 215 topaz street, milpitas, california 95035 tel: (408) 263-3214 fax: (408) 263-7846 www.calmicro.com 8 CMPWR150 california micro devices the CMPWR150to therefore requires no additional heat sinking. all thermal characteristics were measured with the to-263 package using minimum size solder pads and tab. measurements showing performance up to maximum junction temperature of 125c were performed under light load conditions (5ma). this allows the ambient temperature to be representative of the internal junction temperature. output voltage vs. temperature. figure 12 shows the regulator v out performance up to the maximum rated junction temperature. the overall 100c variation in junction temperature causes an output voltage change of about 30mv, reflecting a voltage temperature coefficient of 90ppm/c. output voltage ( 500ma) vs. temperature. figure 13 shows the regulator steady state performance when fully loaded (500ma) in an ambient temperature up to the rated maximum of 70c. the output variation at maximum load is approximately 25mv across the normal temperature range. typical thermal characteristics (continued) figure 12. output voltage vs. temperature. thresholds vs. temperature. figure 14 shows the regulator select/deselect threshold variation up to the maximum rated junction temperature. the overall 100c change in junction temperature causes a 30mv variation in the select threshold voltage (regulator enable). the deselect threshold level varies about 50mv over the 100c change in junction temperature. this results in the built- in hysteresis having minimal variation over the entire operating junction temperature range. figure 14. thresholds vs. temperature. figure 13. output voltage ( 500ma) vs. temperature.
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